FILD
Load Integer
Opcodes
| Hex | Mnemonic | Encoding | Long Mode | Legacy Mode | Description |
|---|---|---|---|---|---|
| DF /5 | FILD m64int | None | Valid | Valid | Push m64int onto the FPU register stack. |
| DB /0 | FILD m32int | None | Valid | Valid | Push m32int onto the FPU register stack. |
| DF /0 | FILD m16int | None | Valid | Valid | Push m16int onto the FPU register stack. |
Description
Converts the signed-integer source operand into double extended-precision floating-point format and pushes the value onto the FPU register stack. The source operand can be a word, doubleword, or quadword integer. It is loaded without rounding errors. The sign of the source operand is preserved.
This instruction's operation is the same in non-64-bit modes and 64-bit mode.
Pseudo Code
TOP = TOP - 1; ST(0) = ConvertToDoubleExtendedPrecisionFP(SRC);
FPU Flags Affected
C1: Set to 1 if stack overflow occurred; set to 0 otherwise. C0, C2, C3 are undefined.
Exceptions
Floating-Point Exceptions
| Exception | Description |
|---|---|
| #IS | Stack overflow occurred. |
64-Bit Mode Exceptions
| Exception | Description |
|---|---|
| #UD | If the LOCK prefix is used. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #PF(fault-code) | If a page fault occurs. |
| #MF | If there is a pending x87 FPU exception. |
| #NM | CR0.EM[bit 2] or CR0.TS[bit 3] = 1. |
| #GP(0) | If the memory address is in a non-canonical form. |
| #SS(0) | If a memory address referencing the SS segment is in a non-canonical form. |
Compatibility Mode Exceptions
Same exceptions as in protected mode.
Virtual-8086 Mode Exceptions
| Exception | Description |
|---|---|
| #UD | If the LOCK prefix is used. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made. |
| #PF(fault-code) | If a page fault occurs. |
| #NM | CR0.EM[bit 2] or CR0.TS[bit 3] = 1. |
| #SS(0) | If a memory operand effective address is outside the SS segment limit. |
| #GP(0) | If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
Real-Address Mode Exceptions
| Exception | Description |
|---|---|
| #UD | If the LOCK prefix is used. |
| #NM | CR0.EM[bit 2] or CR0.TS[bit 3] = 1. |
| #SS | If a memory operand effective address is outside the SS segment limit. |
| #GP | If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. |
Protected Mode Exceptions
| Exception | Description |
|---|---|
| #UD | If the LOCK prefix is used. |
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #PF(fault-code) | If a page fault occurs. |
| #NM | CR0.EM[bit 2] or CR0.TS[bit 3] = 1. |
| #SS(0) | If a memory operand effective address is outside the SS segment limit. |
| #GP(0) | If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector. |