Move Packed Single-FP High and Duplicate
Hex | Mnemonic | Encoding | Long Mode | Legacy Mode | Description |
---|---|---|---|---|---|
F3 0F 16 /r | MOVSHDUP xmm1, xmm2/m128 | A | Valid | Valid | Move two single-precision floating-point values from the higher 32-bit operand of each qword in xmm2/m128 to xmm1 and duplicate each 32-bit operand to the lower 32-bits of each qword. |
Op/En | Operand 0 | Operand 1 | Operand 2 | Operand 3 |
---|---|---|---|---|
A | NA | NA | ModRM:r/m (r) | ModRM:reg (w) |
The linear address corresponds to the address of the least-significant byte of the referenced memory data. When a memory address is indicated, the 16 bytes of data at memory location m128 are loaded and the single-precision elements in positions 1 and 3 are duplicated. When the register-register form of this operation is used, the same operation is performed but with data coming from the 128-bit source register.
In 64-bit mode, use of the REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).
IF (Source = m128) (* Load instruction *) xmm1[31:0] = m128[63:32]; xmm1[63:32] = m128[63:32]; xmm1[95:64] = m128[127:96]; xmm1[127:96] = m128[127:96]; ELSE (* Move instruction *) xmm1[31:0] = xmm2[63:32]; xmm1[63:32] = xmm2[63:32]; xmm1[95:64] = xmm2[127:96]; xmm1[127:96] = xmm2[127:96]; FI;
None
General protection exception if not aligned on 16-byte boundary, regardless of segment.
Exception | Description |
---|---|
#UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.SSE3(ECX, bit 0) is 0. If the LOCK prefix is used. |
#NM | If CR0.TS[bit 3] = 1. |
#PF(fault-code) | For a page fault. |
#GP(0) | If the memory address is in a non-canonical form. If memory operand is not aligned on a 16-byte boundary, regardless of segment. |
#SS(0) | If a memory address referencing the SS segment is not non-canonical. |
Same exceptions as in protected mode.
Exception | Description |
---|---|
#PF(fault-code) | For a page fault. |
#UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. |
#NM | If CR0.TS[bit 3] = 1. |
#GP(0) | If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If memory operand is not aligned on a 16-byte boundary, regardless of segment. |
Exception | Description |
---|---|
#UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. |
#NM | If CR0.TS[bit 3] = 1. |
#GP(0) | If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If memory operand is not aligned on a 16-byte boundary, regardless of segment. |
Exception | Description |
---|---|
#UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:ECX.SSE3[bit 0] = 0. If the LOCK prefix is used. |
#NM | If CR0.TS[bit 3] = 1. |
#PF(fault-code) | For a page fault. |
#SS(0) | For an illegal address in the SS segment. |
#GP(0) | For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If memory operand is not aligned on a 16-byte boundary, regardless of segment. |