RSQRTSS
Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
Opcodes
| Hex | Mnemonic | Encoding | Long Mode | Legacy Mode | Description |
|---|---|---|---|---|---|
| F3 0F 52 /r | RSQRTSS xmm1, xmm2/m32 | A | Valid | Valid | Computes the approximate reciprocal of the square root of the low single-precision floating-point value in xmm2/m32 and stores the results in xmm1. |
Instruction Operand Encoding
| Op/En | Operand 0 | Operand 1 | Operand 2 | Operand 3 |
|---|---|---|---|---|
| A | NA | NA | ModRM:r/m (r) | ModRM:reg (w) |
Description
Computes an approximate reciprocal of the square root of the low single-precision floating-point value in the source operand (second operand) stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register. The three high-order doublewords of the destination operand remain unchanged. See Figure 10-6 in the Intel®64 and IA-32 Architectures SoftwareDeveloper's Manual, Volume 1, for an illustration of a scalar single-precision floating-point operation.
The relative error for this approximation is:
|Relative Error| &le 1.5 * 2-12
The RSQRTSS instruction is not affected by the rounding control bits in the MXCSR register. When a source value is a 0.0, an ∞ of the sign of the source value is returned. A denormal source value is treated as a 0.0 (of the same sign). When a source value is a negative value (other than -0.0), a floating-point indefinite is returned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaN or the source QNaN is returned.
In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction to access additional registers (XMM8-XMM15).
Pseudo Code
DEST[31:0] = APPROXIMATE(1.0/SQRT(SRC[31:0])); (* DEST[127:32] unchanged *)
Exceptions
SIMD Floating-Point Exceptions
None.
64-Bit Mode Exceptions
| Exception | Description |
|---|---|
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used. |
| #NM | If CR0.TS[bit 3] = 1. |
| #PF(fault-code) | For a page fault. |
| #GP(0) | If the memory address is in a non-canonical form. |
| #SS(0) | If a memory address referencing the SS segment is in a non- canonical form. |
Compatibility Mode Exceptions
Same exceptions as in protected mode.
Virtual-8086 Mode Exceptions
| Exception | Description |
|---|---|
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made. |
| #PF(fault-code) | For a page fault. |
| Same exceptions as in real address mode. | |
Real-Address Mode Exceptions
| Exception | Description |
|---|---|
| #UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used. |
| #NM | If CR0.TS[bit 3] = 1. |
| #GP | If any part of the operand lies outside the effective address space from 0 to FFFFH. |
Protected Mode Exceptions
| Exception | Description |
|---|---|
| #AC(0) | If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. |
| #UD | If CR0.EM[bit 2] = 1. If CR4.OSFXSR[bit 9] = 0. If CPUID.01H:EDX.SSE[bit 25] = 0. If the LOCK prefix is used. |
| #NM | If CR0.TS[bit 3] = 1. |
| #PF(fault-code) | For a page fault. |
| #SS(0) | For an illegal address in the SS segment. |
| #GP(0) | For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. |