This is an unofficial online version of the Intel 64 instruction set reference. It provides a list of the available instructions for IA-32 and Intel 64 microprocessors, their assembly mnemonics, encodings, descriptions, pseudo code and the exceptions they can throw. This information is largely compatible with AMD64 processors, except for some minor differences.
Instruction | Description |
---|---|
AAA | ASCII Adjust After Addition |
AAD | ASCII Adjust AX Before Division |
AAM | ASCII Adjust AX After Multiply |
AAS | ASCII Adjust AL After Subtraction |
ADD | Add |
ADDPD | Add Packed Double-Precision Floating-Point Values |
ADDPS | Add Packed Single-Precision Floating-Point Values |
ADDSD | Add Scalar Double-Precision Floating-Point Values |
ADDSS | Add Scalar Single-Precision Floating-Point Values |
ADDSUBPD | Packed Double-FP Add/Subtract |
ADDSUBPS | Packed Single-FP Add/Subtract |
AESDEC | Perform One Round of an AES Decryption Flow |
AESDECLAST | Perform Last Round of an AES Decryption Flow |
AESENC | Perform One Round of an AES Encryption Flow |
AESENCLAST | Perform Last Round of an AES Encryption Flow |
AESIMC | Perform the AES InvMixColumn Transformation |
AESKEYGENASSIST | AES Round Key Generation Assist |
ANDNPD | Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values |
ANDNPS | Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values |
ANDPD | Bitwise Logical AND of Packed Double-Precision Floating-Point Values |
ANDPS | Bitwise Logical AND of Packed Single-Precision Floating-Point Values |
ARPL | Adjust RPL Field of Segment Selector |
BLENDPD | Blend Packed Double Precision Floating-Point Values |
BLENDPS | Blend Packed Single Precision Floating-Point Values |
BLENDVPD | Variable Blend Packed Double Precision Floating-Point Values |
BLENDVPS | Variable Blend Packed Single Precision Floating-Point Values |
BOUND | Check Array Index Against Bounds |
BSF | Bit Scan Forward |
BSR | Bit Scan Reverse |
BSWAP | Byte Swap |
BT | Bit Test |
BTC | Bit Test and Complement |
BTR | Bit Test and Reset |
BTS | Bit Test and Set |
CALL | Call Procedure |
CBW/CWDE/CDQE | Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword |
CLC | Clear Carry Flag |
CLD | Clear Direction Flag |
CLFLUSH | Flush Cache Line |
CLI | Clear Interrupt Flag |
CLTS | Clear Task-Switched Flag in CR0 |
CMC | Complement Carry Flag |
CMOVcc | Conditional Move |
CMP | Compare Two Operands |
CMPPD | Compare Packed Double-Precision Floating-Point Values |
CMPPS | Compare Packed Single-Precision Floating-Point Values |
CMPS/CMPSB/CMPSW/CMPSD/CMPSQ | Compare String Operands |
CMPSS | Compare Scalar Single-Precision Floating-Point Values |
CMPXCHG | Compare and Exchange |
CMPXCHG8B/CMPXCHG16B | Compare and Exchange Bytes |
COMISS | Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS |
CPUID | CPU Identification |
CRC32 | Accumulate CRC32 Value |
CVTDQ2PD | Convert Packed Dword Integers to Packed Double-Precision FP Values |
CVTDQ2PS | Convert Packed Dword Integers to Packed Single-Precision FP Values |
CVTPD2DQ | Convert Packed Double-Precision FP Values to Packed Dword Integers |
CVTPD2PI | Convert Packed Double-Precision FP Values to Packed Dword Integers |
CVTPD2PS | Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values |
CVTPI2PD | Convert Packed Dword Integers to Packed Double-Precision FP Values |
CVTPI2PS | Convert Packed Dword Integers to Packed Single-Precision FP Values |
CVTPS2DQ | Convert Packed Single-Precision FP Values to Packed Dword Integers |
CVTPS2PD | Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values |
CVTPS2PI | Convert Packed Single-Precision FP Values to Packed Dword Integers |
CVTSD2SI | Convert Scalar Double-Precision FP Value to Integer |
CVTSD2SS | Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value |
CVTSI2SD | Convert Dword Integer to Scalar Double-Precision FP Value |
CVTSI2SS | Convert Dword Integer to Scalar Single-Precision FP Value |
CVTSS2SD | Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value |
CVTSS2SI | Convert Scalar Single-Precision FP Value to Dword Integer |
CVTTPD2DQ | Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers |
CVTTPD2PI | Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers |
CVTTPS2DQ | Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers |
CVTTPS2PI | Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers |
CVTTSD2SI | Convert with Truncation Scalar Double-Precision FP Value to Signed Integer |
CVTTSS2SI | Convert with Truncation Scalar Single-Precision FP Value to Dword Integer |
CWD/CDQ/CQO | Convert Word to Doubleword/Convert Doubleword to Quadword |
DAA | Decimal Adjust AL after Addition |
DAS | Decimal Adjust AL after Subtraction |
DEC | Decrement by 1 |
DIV | Unsigned Divide |
DIVPD | Divide Packed Double-Precision Floating-Point Values |
DIVPS | Divide Packed Single-Precision Floating-Point Values |
DIVSD | Divide Scalar Double-Precision Floating-Point Values |
DIVSS | Divide Scalar Single-Precision Floating-Point Values |
DPPD | Dot Product of Packed Double Precision Floating-Point Values |
DPPS | Dot Product of Packed Single Precision Floating-Point Values |
EMMS | Empty MMX Technology State |
ENTER | Make Stack Frame for Procedure Parameters |
EXTRACTPS | Extract Packed Single Precision Floating-Point Value |
F2XM1 | Calculate 2^{x} - 1 |
FABS | Absolute Value |
FADD/FADDP/FIADD | Add |
FBLD | Load Binary Coded Decimal |
FBSTP | Store BCD Integer and Pop |
FCHS | Change Sign |
FCLEX/FNCLEX | Clear Exceptions |
FCMOVcc | Floating-Point Conditional Move |
FCOMI/FCOMIP/FUCOMI/FUCOMIP | Compare Floating Point Values and Set EFLAGS |
FDECSTP | Decrement Stack-Top Pointer |
FDIV/FDIVP/FIDIV | Divide |
FDIVR/FDIVRP/FIDIVR | Reverse Divide |
FICOM/FICOMP | Compare Integer |
FILD | Load Integer |
FINCSTP | Increment Stack-Top Pointer |
FINIT/FNINIT | Initialize Floating-Point Unit |
FIST/FISTP | Store Integer |
FISTTP | Store Integer with Truncation |
FLD | Load Floating Point Value |
FLD1/FLDL2T/FLDL2E/FLDPI/FLDLG2/FLDLN2/FLDZ | Load Constant |
FLDENV | Load x87 FPU Environment |
FMUL/FMULP/FIMUL | Multiply |
FNOP | No Operation |
FPATAN | Partial Arctangent |
FPREM | Partial Remainder |
FPREM1 | Partial Remainder |
FPTAN | Partial Tangent |
FRNDINT | Round to Integer |
FRSTOR | Restore x87 FPU State |
FSAVE/FNSAVE | Store x87 FPU State |
FSCALE | Scale |
FSIN | Sine |
FSINCOS | Sine and Cosine |
FSQRT | Square Root |
FSTCW/FNSTCW | Store x87 FPU Control Word |
FSTENV/FNSTENV | Store x87 FPU Environment |
FST/FSTP | Store Floating Point Value |
FSTSW/FNSTSW | Store x87 FPU Status Word |
FSUB/FSUBP/FISUB | Subtract |
FSUBR/FSUBRP/FISUBR | Reverse Subtract |
FTST | TEST |
FUCOM/FUCOMP/FUCOMPP | Unordered Compare Floating Point Values |
FXCH | Exchange Register Contents |
FXRSTOR | Restore x87 FPU, MMX , XMM, and MXCSR State |
FXSAVE | Save x87 FPU, MMX Technology, and SSE State |
FXTRACT | Extract Exponent and Significand |
FYL2X | Calculate y × log_{2}(x) |
FYL2XP1 | Calculate y × log_{2}(x + 1) |
GETSEC[CAPABILITIES] | Report the SMX Capabilities |
GETSEC[ENTERACCS] | Execute Authenticated Chipset Code |
GETSEC[PARAMETERS] | Report the SMX Parameters |
GETSEC[SENTER] | Enter a Measured Environment |
GETSEC[SEXIT] | Exit Measured Environment |
GETSEC[SMCTRL] | SMX Mode Control |
GETSEC[WAKEUP] | Wake up sleeping processors in measured environment |
HADDPD | Packed Double-FP Horizontal Add |
HADDPS | Packed Single-FP Horizontal Add |
HLT | Halt |
HSUBPD | Packed Double-FP Horizontal Subtract |
HSUBPS | Packed Single-FP Horizontal Subtract |
IDIV | Signed Divide |
IMUL | Signed Multiply |
IN | Input from Port |
INC | Increment by 1 |
INSERTPS | Insert Packed Single Precision Floating-Point Value |
INS/INSB/INSW/INSD | Input from Port to String |
INT n/INTO/INT 3 | Call to Interrupt Procedure |
INVD | Invalidate Internal Caches |
INVEPT | Invalidate Translations Derived from EPT |
INVLPG | Invalidate TLB Entry |
INVVPID | Invalidate Translations Based on VPID |
IRET/IRETD | Interrupt Return |
Jcc | Jump if Condition Is Met |
JMP | Jump |
LAHF | Load Status Flags into AH Register |
LAR | Load Access Rights Byte |
LDDQU | Load Unaligned Integer 128 Bits |
LDMXCSR | Load MXCSR Register |
LDS/LES/LFS/LGS/LSS | Load Far Pointer |
LEAVE | High Level Procedure Exit |
LFENCE | Load Fence |
LGDT/LIDT | Load Global/Interrupt Descriptor Table Register |
LLDT | Load Local Descriptor Table Register |
LMSW | Load Machine Status Word |
LOCK | Assert LOCK# Signal Prefix |
LODS/LODSB/LODSW/LODSD/LODSQ | Load String |
LSL | Load Segment Limit |
LTR | Load Task Register |
MASKMOVDQU | Store Selected Bytes of Double Quadword |
MASKMOVQ | Store Selected Bytes of Quadword |
MAXPD | Return Maximum Packed Double-Precision Floating-Point Values |
MAXPS | Return Maximum Packed Single-Precision Floating-Point Values |
MAXSD | Return Maximum Scalar Double-Precision Floating-Point Value |
MAXSS | Return Maximum Scalar Single-Precision Floating-Point Value |
MFENCE | Memory Fence |
MINPD | Return Minimum Packed Double-Precision Floating-Point Values |
MINPS | Return Minimum Packed Single-Precision Floating-Point Values |
MINSD | Return Minimum Scalar Double-Precision Floating-Point Value |
MINSS | Return Minimum Scalar Single-Precision Floating-Point Value |
MONITOR | Set Up Monitor Address |
MOV | Move to/from Control Registers |
MOV | Move to/from Debug Registers |
MOV | Move |
MOVAPD | Move Aligned Packed Double-Precision Floating-Point Values |
MOVAPS | Move Aligned Packed Single-Precision Floating-Point Values |
MOVBE | Move Data After Swapping Bytes |
MOVDDUP | Move One Double-FP and Duplicate |
MOVD/MOVQ | Move Doubleword/Move Quadword |
MOVDQ2Q | Move Quadword from XMM to MMX Technology Register |
MOVDQA | Move Aligned Double Quadword |
MOVDQU | Move Unaligned Double Quadword |
MOVHLPS | Move Packed Single-Precision Floating-Point Values High to Low |
MOVHPD | Move High Packed Double-Precision Floating-Point Value |
MOVHPS | Move High Packed Single-Precision Floating-Point Values |
MOVLHPS | Move Packed Single-Precision Floating-Point Values Low to High |
MOVLPD | Move Low Packed Double-Precision Floating-Point Value |
MOVLPS | Move Low Packed Single-Precision Floating-Point Values |
MOVMSKPD | Extract Packed Double-Precision Floating-Point Sign Mask |
MOVMSKPS | Extract Packed Single-Precision Floating-Point Sign Mask |
MOVNTDQ | Store Double Quadword Using Non-Temporal Hint |
MOVNTDQA | Load Double Quadword Non-Temporal Aligned Hint |
MOVNTI | Store Doubleword Using Non-Temporal Hint |
MOVNTPD | Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint |
MOVNTPS | Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint |
MOVNTQ | Store of Quadword Using Non-Temporal Hint |
MOVQ | Move Quadword |
MOVQ2DQ | Move Quadword from MMX Technology to XMM Register |
MOVSHDUP | Move Packed Single-FP High and Duplicate |
MOVSLDUP | Move Packed Single-FP Low and Duplicate |
MOVS/MOVSB/MOVSW/MOVSD/MOVSQ | Move Data from String to String |
MOVSS | Move Scalar Single-Precision Floating-Point Values |
MOVSX/MOVSXD | Move with Sign-Extension |
MOVUPD | Move Unaligned Packed Double-Precision Floating-Point Values |
MOVUPS | Move Unaligned Packed Single-Precision Floating-Point Values |
MOVZX | Move with Zero-Extend |
MPSADBW | Compute Multiple Packed Sums of Absolute Difference |
MUL | Unsigned Multiply |
MULPD | Multiply Packed Double-Precision Floating-Point Values |
MULPS | Multiply Packed Single-Precision Floating-Point Values |
MULSD | Multiply Scalar Double-Precision Floating-Point Values |
MULSS | Multiply Scalar Single-Precision Floating-Point Values |
MWAIT | Monitor Wait |
NEG | Two's Complement Negation |
NOP | No Operation |
NOT | One's Complement Negation |
OR | Logical Inclusive OR |
ORPD | Bitwise Logical OR of Double-Precision Floating-Point Values |
ORPS | Bitwise Logical OR of Single-Precision Floating-Point Values |
OUT | Output to Port |
OUTS/OUTSB/OUTSW/OUTSD | Output String to Port |
PABSB/PABSW/PABSD | Packed Absolute Value |
PACKUSDW | Pack with Unsigned Saturation |
PACKUSWB | Pack with Unsigned Saturation |
PADDB/PADDW/PADDD | Add Packed Integers |
PADDQ | Add Packed Quadword Integers |
PADDSB/PADDSW | Add Packed Signed Integers with Signed Saturation |
PADDUSB/PADDUSW | Add Packed Unsigned Integers with Unsigned Saturation |
PALIGNR | Packed Align Right |
PAND | Logical AND |
PANDN | Logical AND NOT |
PAUSE | Spin Loop Hint |
PAVGB/PAVGW | Average Packed Integers |
PBLENDVB | Variable Blend Packed Bytes |
PBLENDW | Blend Packed Words |
PCLMULQDQ | Carry-Less Multiplication Quadword |
PCMPEQB/PCMPEQW/PCMPEQD | Compare Packed Data for Equal |
PCMPESTRI | Packed Compare Explicit Length Strings, Return Index |
PCMPESTRM | Packed Compare Explicit Length Strings, Return Mask |
PCMPGTB/PCMPGTW/PCMPGTD | Compare Packed Signed Integers for Greater Than |
PCMPISTRI | Packed Compare Implicit Length Strings, Return Index |
PCMPISTRM | Packed Compare Implicit Length Strings, Return Mask |
PEXTRB/PEXTRD/PEXTRQ | Extract Byte/Dword/Qword |
PHADDSW | Packed Horizontal Add and Saturate |
PHADDW/PHADDD | Packed Horizontal Add |
PHMINPOSUW | Packed Horizontal Word Minimum |
PHSUBSW | Packed Horizontal Subtract and Saturate |
PHSUBW/PHSUBD | Packed Horizontal Subtract |
PINSRB/PINSRD/PINSRQ | Insert Byte/Dword/Qword |
PMADDUBSW | Multiply and Add Packed Signed and Unsigned Bytes |
PMADDWD | Multiply and Add Packed Integers |
PMAXSB | Maximum of Packed Signed Byte Integers |
PMAXSD | Maximum of Packed Signed Dword Integers |
PMAXSW | Maximum of Packed Signed Word Integers |
PMAXUB | Maximum of Packed Unsigned Byte Integers |
PMAXUD | Maximum of Packed Unsigned Dword Integers |
PMAXUW | Maximum of Packed Word Integers |
PMINSB | Minimum of Packed Signed Byte Integers |
PMINSD | Minimum of Packed Dword Integers |
PMINSW | Minimum of Packed Signed Word Integers |
PMINUB | Minimum of Packed Unsigned Byte Integers |
PMINUD | Minimum of Packed Dword Integers |
PMINUW | Minimum of Packed Word Integers |
PMOVMSKB | Move Byte Mask |
PMOVSX | Packed Move with Sign Extend |
PMOVZX | Packed Move with Zero Extend |
PMULDQ | Multiply Packed Signed Dword Integers |
PMULHRSW | Packed Multiply High with Round and Scale |
PMULHUW | Multiply Packed Unsigned Integers and Store High Result |
PMULHW | Multiply Packed Signed Integers and Store High Result |
PMULLD | Multiply Packed Signed Dword Integers and Store Low Result |
PMULLW | Multiply Packed Signed Integers and Store Low Result |
PMULUDQ | Multiply Packed Unsigned Doubleword Integers |
POP | Pop a Value from the Stack |
POPA/POPAD | Pop All General-Purpose Registers |
POPCNT | Return the Count of Number of Bits Set to 1 |
POPF/POPFD/POPFQ | Pop Stack into EFLAGS Register |
POR | Bitwise Logical OR |
PREFETCHh | Prefetch Data Into Caches |
PSADBW | Compute Sum of Absolute Differences |
PSHUFB | Packed Shuffle Bytes |
PSHUFD | Shuffle Packed Doublewords |
PSHUFHW | Shuffle Packed High Words |
PSHUFLW | Shuffle Packed Low Words |
PSHUFW | Shuffle Packed Words |
PSIGNB/PSIGNW/PSIGND | Packed SIGN |
PSLLW/PSLLD/PSLLQ | Shift Packed Data Left Logical |
PSRAW/PSRAD | Shift Packed Data Right Arithmetic |
PSRLDQ | Shift Double Quadword Right Logical |
PSRLW/PSRLD/PSRLQ | Shift Packed Data Right Logical |
PSUBB/PSUBW/PSUBD | Subtract Packed Integers |
PSUBQ | Subtract Packed Quadword Integers |
PSUBSB/PSUBSW | Subtract Packed Signed Integers with Signed Saturation |
PSUBUSB/PSUBUSW | Subtract Packed Unsigned Integers with Unsigned Saturation |
PTEST | Logical Compare |
PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ | Unpack High Data |
PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ | Unpack Low Data |
PUSHA/PUSHAD | Push All General-Purpose Registers |
PUSHF/PUSHFD | Push EFLAGS Register onto the Stack |
PXOR | Logical Exclusive OR |
RCL/RCR/ROL/ROR | Perform bit rotation |
RCPPS | Compute Reciprocals of Packed Single-Precision Floating-Point Values |
RCPSS | Compute Reciprocal of Scalar Single-Precision Floating-Point Values |
RDMSR | Read from Model Specific Register |
RDPMC | Read Performance-Monitoring Counters |
RDTSC | Read Time-Stamp Counter |
RDTSCP | Read Time-Stamp Counter and Processor ID |
REP/REPE/REPZ/REPNE/REPNZ | Repeat String Operation Prefix |
ROUNDPD | Round Packed Double Precision Floating-Point Values |
ROUNDPS | Round Packed Single Precision Floating-Point Values |
ROUNDSD | Round Scalar Double Precision Floating-Point Values |
ROUNDSS | Round Scalar Single Precision Floating-Point Values |
RSM | Resume from System Management Mode |
RSQRTPS | Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values |
RSQRTSS | Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value |
SAHF | Store AH into Flags |
SAL/SAR/SHL/SHR | Shift |
SCAS/SCASB/SCASW/SCASD | Scan String |
SFENCE | Store Fence |
SGDT | Store Global Descriptor Table Register |
SHLD | Double Precision Shift Left |
SHRD | Double Precision Shift Right |
SHUFPD | Shuffle Packed Double-Precision Floating-Point Values |
SHUFPS | Shuffle Packed Single-Precision Floating-Point Values |
SIDT | Store Interrupt Descriptor Table Register |
SLDT | Store Local Descriptor Table Register |
SMSW | Store Machine Status Word |
SQRTPS | Compute Square Roots of Packed Single-Precision Floating-Point Values |
SQRTSD | Compute Square Root of Scalar Double-Precision Floating-Point Value |
SQRTSS | Compute Square Root of Scalar Single-Precision Floating-Point Value |
STC | Set Carry Flag |
STD | Set Direction Flag |
STI | Set Interrupt Flag |
STMXCSR | Store MXCSR Register State |
STOS/STOSB/STOSW/STOSD/STOSQ | Store String |
SUB | Subtract |
SUBPD | Subtract Packed Double-Precision Floating-Point Values |
SUBPS | Subtract Packed Single-Precision Floating-Point Values |
SUBSD | Subtract Scalar Double-Precision Floating-Point Values |
SUBSS | Subtract Scalar Single-Precision Floating-Point Values |
SWAPGS | Swap GS Base Register |
SYSCALL | Fast System Call |
SYSENTER | Fast System Call |
SYSEXIT | Fast Return from Fast System Call |
SYSRET | Return From Fast System Call |
TEST | Logical Compare |
UCOMISD | Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS |
UCOMISS | Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS |
UD2 | Undefined Instruction |
UNPCKHPD | Unpack and Interleave High Packed Double-Precision Floating-Point Values |
UNPCKHPS | Unpack and Interleave High Packed Single-Precision Floating-Point Values |
UNPCKLPD | Unpack and Interleave Low Packed Double-Precision Floating-Point Values |
UNPCKLPS | Unpack and Interleave Low Packed Single-Precision Floating-Point Values |
VERR/VERW | Verify a Segment for Reading or Writing |
VMCALL | Call to VM Monitor |
VMCLEAR | Clear Virtual-Machine Control Structure |
VMLAUNCH/VMRESUME | Launch/Resume Virtual Machine |
VMPTRLD | Load Pointer to Virtual-Machine Control Structure |
VMPTRST | Store Pointer to Virtual-Machine Control Structure |
VMREAD | Read Field from Virtual-Machine Control Structure |
VMWRITE | Write Field to Virtual-Machine Control Structure |
VMXOFF | Leave VMX Operation |
VMXON | Enter VMX Operation |
WAIT/FWAIT | Wait |
WBINVD | Write Back and Invalidate Cache |
WRMSR | Write to Model Specific Register |
XADD | Exchange and Add |
XCHG | Exchange Register/Memory with Register |
XGETBV | Get Value of Extended Control Register |
XLAT/XLATB | Table Look-up Translation |
XOR | Logical Exclusive OR |
XORPD | Bitwise Logical XOR for Double-Precision Floating-Point Values |
XORPS | Bitwise Logical XOR for Single-Precision Floating-Point Values |
XRSTOR | Restore Processor Extended States |
XSAVE | Save Processor Extended States |
XSETBV | Set Extended Control Register |